In the design of circuit modules having integrated circuit chips it is desirable that the circuit modules be of compact construction, and that leads and conductive elements connected to circuits within the integrated circuit chips be as short as possible to minimize inductive interference and noise. Typically, such a circuit assembly includes a number of conductive fingers supported within a body of non-conductive encapsulant material and connected to external pins or terminals, and conductive elements interconnected between the fingers and respective circuits within the chip, for providing power, ground, and signal lines.
It is preferable to minimize the length of such lines through the use of an intermediate, interposer substrate on which the integrated circuit chip may be mounted and whereby leads may be connected between nodes or terminals on the chip and corresponding conductors on the interposer substrate. However, prior-art circuit modules utilizing such interposer substrates have suffered from several limitations and deficiencies. One such limitation is that conductors and electrical components mounted on the interposer substrates have been undesirably crowded, resulting in potential inductive interference when high frequency signals are present on one or more adjacent conductors. For example, digital, analog, and input/output circuits in such modules have been undesirably crowded together on such substrates or, alternatively, the substrates and lead frames have been required to be of undesirable complexity and size. Thus, the packaging of such circuit assemblies is a major factor in the design and manufacture of electronic systems, and new packaging techniques are required to achieve reduced physical size, improved reliability, and low cost. The need for such efficient packaging is particularly important with respect to electronic circuit assemblies which utilize compact circuit structures of the type implemented by large-scale-integration (LSI) techniques, utilizing semiconductor chips.